Wed, 04 Aug 2021 20:03:24 UTC

Information for RPM verilator-3.845-1.fc19.armv7hl.rpm

ID4170004
Nameverilator
Version3.845
Release1.fc19
Epoch
Archarmv7hl
SummaryA fast simulator for synthesizable Verilog
Description Verilator is the fastest free Verilog HDL simulator. It compiles synthesizable Verilog, plus some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code. It is designed for large projects where fast simulation performance is of primary concern, and is especially well suited to create executable models of CPUs for embedded software design teams.
Build Time2013-03-17 02:05:30 GMT
Size2,060,268
3ca30edffb7d2e37cda2fdd6be6735c8
LicenseGPLv2
Provides
verilator = 3.845-1.fc19
verilator(armv7hl-32) = 3.845-1.fc19
Obsoletes No Obsoletes
Conflicts No Conflicts
Requires
libc.so.6
libc.so.6(GLIBC_2.4)
libgcc_s.so.1
libgcc_s.so.1(GCC_3.5)
libm.so.6
libm.so.6(GLIBC_2.4)
libstdc++.so.6
libstdc++.so.6(CXXABI_1.3)
libstdc++.so.6(CXXABI_ARM_1.3.3)
libstdc++.so.6(GLIBCXX_3.4)
libstdc++.so.6(GLIBCXX_3.4.11)
libstdc++.so.6(GLIBCXX_3.4.15)
libstdc++.so.6(GLIBCXX_3.4.9)
perl-SystemPerl-devel >= 1.320
rpmlib(CompressedFileNames) <= 3.0.4-1
rpmlib(FileDigests) <= 4.6.0-1
rpmlib(PayloadFilesHavePrefix) <= 4.0-1
rpmlib(PayloadIsXz) <= 5.2-1
rtld(GNU_HASH)
Recommends No Recommends
Suggests No Suggests
Supplements No Supplements
Enhances No Enhances
Files
Page:
1 through 50 of 68 >>>
Name ascending sort Size
/usr/bin/verilator140,884
/usr/bin/verilator_bin2,706,228
/usr/bin/verilator_bin_dbg3,647,848
/usr/bin/verilator_profcfunc5,879
/usr/share/doc/verilator-3.8454,096
/usr/share/doc/verilator-3.845/Artistic9,073
/usr/share/doc/verilator-3.845/COPYING35,147
/usr/share/doc/verilator-3.845/Changes66,265
/usr/share/doc/verilator-3.845/README7,733
/usr/share/doc/verilator-3.845/TODO6,731
/usr/share/doc/verilator-3.845/examples4,096
/usr/share/doc/verilator-3.845/examples/test_c4,096
/usr/share/doc/verilator-3.845/examples/test_c/Makefile2,253
/usr/share/doc/verilator-3.845/examples/test_c/Makefile_obj1,134
/usr/share/doc/verilator-3.845/examples/test_c/sim_main.cpp2,346
/usr/share/doc/verilator-3.845/examples/test_sc4,096
/usr/share/doc/verilator-3.845/examples/test_sc/Makefile1,937
/usr/share/doc/verilator-3.845/examples/test_sc/Makefile_obj1,123
/usr/share/doc/verilator-3.845/examples/test_sc/sc_main.cpp4,502
/usr/share/doc/verilator-3.845/examples/test_sp4,096
/usr/share/doc/verilator-3.845/examples/test_sp/Makefile2,501
/usr/share/doc/verilator-3.845/examples/test_sp/Makefile_obj1,232
/usr/share/doc/verilator-3.845/examples/test_v4,096
/usr/share/doc/verilator-3.845/examples/test_v/input.vc76
/usr/share/doc/verilator-3.845/examples/test_v/t.v1,700
/usr/share/doc/verilator-3.845/examples/test_v/t_chg.v1,827
/usr/share/doc/verilator-3.845/examples/test_v/t_clk.v2,988
/usr/share/doc/verilator-3.845/examples/test_v/t_clk_flop.v532
/usr/share/doc/verilator-3.845/examples/test_v/t_clk_two.v944
/usr/share/doc/verilator-3.845/examples/test_v/t_inst.v3,634
/usr/share/doc/verilator-3.845/examples/test_v/t_inst_a.v779
/usr/share/doc/verilator-3.845/examples/test_v/t_inst_b.v825
/usr/share/doc/verilator-3.845/examples/test_v/t_netlist.v1,260
/usr/share/doc/verilator-3.845/examples/test_v/t_param.v4,544
/usr/share/doc/verilator-3.845/examples/test_v/t_param_a.v658
/usr/share/doc/verilator-3.845/examples/test_v/t_param_b.v435
/usr/share/doc/verilator-3.845/examples/test_v/top.v885
/usr/share/doc/verilator-3.845/verilator.html171,176
/usr/share/doc/verilator-3.845/verilator.pdf384,883
/usr/share/man/man1/verilator.1.gz50,206
/usr/share/verilator4,096
/usr/share/verilator/bin4,096
/usr/share/verilator/bin/verilator_includer617
/usr/share/verilator/include4,096
/usr/share/verilator/include/verilated.cpp40,389
/usr/share/verilator/include/verilated.h68,059
/usr/share/verilator/include/verilated.mk6,274
/usr/share/verilator/include/verilated.v1,150
/usr/share/verilator/include/verilated_config.h1,113
/usr/share/verilator/include/verilated_config.h.in1,119
Component of No Buildroots